Heterogeneous Integration of Electrical IC and Photonic IC Packaging

Level: Introductory Length: 4 hours Format: In-Person Lecture Intended Audience: Scientists, engineers, technicians, or managers who wish to learn more about heterogenous integration of EIC and PIC packaging. Undergraduate training in engineering or science is assumed. Description: This course explains basic principles and applications of heterogeneous integration of Electrical IC (EIC) and Photonic IC (PIC) packaging. A primary goal of the course is to reveal the fundamental, design, materials, process, fabrication, and reliability of EIC and PIC packaging. Examples are taken from 3D stacking of EIC on PIC, heterogeneous integration of EIC and PIC with fan-out chip-last wafer-level flip-chip bonding method, to heterogeneous integration of EIC and PIC with through-silicon via (TSV)-interposer and fiber coupling method. Anyone who wants to answer questions such as, “how to build heterogeneous integration of EIC and PIC package?”, “how to stack EIC on PIC?”, “how to make microbump?”, “how to make fan-out package?”, “how to do flip chip packaging?”, or “how to make TSV-interposer?” will benefit from taking this course. Learning Outcomes: This course will enable you to: - design, materials, process, fabrication, and reliability of heterogeneous integration of EIC and PIC packaging - design, materials, process, fabrication, and reliability of 3D stacking EIC on PIC - design, materials, process, fabrication, and reliability of heterogeneous integration of EIC and PIC with fan-out packaging - design, materials, process, fabrication, and reliability of heterogeneous integration of EIC and PIC with TSV-interposer packaging - explain microbump and C4-bump technology - explain flip chip technology - explain fan-out technology - explain surface mount technology - explain TSV-interposer technology - explain 3D IC stacking technology Instructor(s): John H. Lau with more than 40 years of R&D and manufacturing experiences in semiconductor packaging has published more than 510 peer-reviewed papers, 40 issued and pending U.S. patents, and 22 textbooks, e.g., Semiconductor Advanced Packaging (498 pages, Springer, 2021). He earned a Ph.D. in Theoretical and Applied Mechanics from the University of Illinois at Champaign-Urbana. Dr. Lau has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share. He is a Fellow of ASME, IEEE, and IMAPS. Event: SPIE Photonics West 2023 Course Held: 29 January 2023